{"author":"uuuvn","author_email":"83587632+uuuvn@users.noreply.github.com","author_time":1711063071,"commit_time":1711063071,"committer":"GitHub","committer_email":"noreply@github.com","hash":"6729f20aabcf2f9ad8314b207c09276c481b48dc","message":"Ring allreduce try 2 (#3852)\n\n* Ring allreduce v3\r\n\r\n* Configurable size, number of gpus and jit in benchmark\r\n\r\n* ScheduleBarrier v0\r\n\r\n* GB/s that make sense\r\n\r\n* ScheduleBarrier v0.1\r\n\r\n* Fallback on 2 GPUs\r\n\r\n* ScheduleBarrier v0.2\r\n\r\n* ScheduleBarrier v0.3\r\n\r\n* ScheduleBarrier v0.3.1\r\n\r\n* ScheduleBarrier v0.3.2\r\n\r\n* Replace ScheduleBarrier with automatic optimization\r\n\r\n* unused import\r\n\r\n* fix comment\r\n\r\n* typing\r\n\r\n* better fallback\r\n\r\n* python 3.8\r\n\r\n* RING=2 and use ContextVar\r\n\r\n* DEBUG >= 2 and change name\r\n\r\n* linter\r\n\r\n* type\r\n\r\n---------\r\n\r\nCo-authored-by: George Hotz <72895+geohot@users.noreply.github.com>\r\nCo-authored-by: chenyu <chenyu@fastmail.com>\r\nCo-authored-by: nimlgen <138685161+nimlgen@users.noreply.github.com>","parents":["3c0478bfab235692ce1c02e1d1306c7c31260f7a"],"tree_hash":"c2e641e86378a1a9f99c69b7263ca8abc40b6715"}